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Product Details
K4B4G1646E-BYMA 4Gb DDR4 SDRAM Samsung electronic components shops
Samsung Electronics DRAM Chip DDR3L SDRAM 4Gbit 256Mx16 1.35V/1.5V 96-Pin FBGA K4B4G1646E-BYMA
The 4Gb DDR3 SDRAM E-die is organized as a 32Mbit x 16I/Os x 8banks, device. This synchronous device achieves high speed double-data-rate transfer rates of up to 1866Mb/sec/pin (DDR3-1866) for general applications.
The chip is designed to comply with the following key DDR3 SDRAM features such as posted CAS, Programmable CWL, Internal (Self) Calibration, On Die Termination using ODT pin and Asynchronous Reset .
All of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the crosspoint of differential clocks (CK rising and CK falling). All I/Os are synchronized with a pair of bidirectional strobes (DQS and DQS) in a source synchronous fashion. The address bus is used to convey row, column, and bank address information in a RAS/CAS multiplexing style. The DDR3 device operates with a single 1.35V(1.28V~1.45V) or 1.5V(1.425V~1.575V) power supply and 1.35V(1.28V~1.45V) or 1.5V(1.425V~1.575V) V DDQ .
The 4Gb DDR3L E-die device is available in 96ball FBGAs(x16).
JEDEC standard 1.35V(1.28V~1.45V) & 1.5V(1.425V~1.575V)
V DDQ = 1.35V(1.28V~1.45V) & 1.5V(1.425V~1.575V)
400 MHz fCK for 800Mb/sec/pin, 533MHz f CK for 1066Mb/sec/pin,
667MHz f CK for 1333Mb/sec/pin, 800MHz f CK for 1600Mb/sec/pin
933MHz fCK for 1866Mb/sec/pin
8 Banks
Programmable CAS Latency(posted CAS): 5,6,7,8,9,10,11,12,13
Programmable Additive Latency: 0, CL-2 or CL-1 clock
Programmable CAS Write Latency (CWL) = 5 (DDR3-800), 6
(DDR3-1066), 7 (DDR3-1333), 8 (DDR3-1600) and 9(DDR3-1866)
8-bit pre-fetch
Burst Length: 8 , 4 with tCCD = 4 which does not allow seamless read or write [either On the fly using A12 or MRS]
Bi-directional Differential Data-Strobe
Internal(self) calibration : Internal self calibration through ZQ pin
(RZQ : 240 ohm ± 1%)
On Die Termination using ODT pin
Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE < 95 °C
Support Industrial Temp ( -40-95°C )
– tREFI 7.8us at -40 °C ≤ TCASE ≤ 85°C
– tREFI 3.9us at 85 °C < TCASE ≤ 95°C
Asynchronous Reset
Package : 96 balls FBGA – x16
All of Lead-Free products are compliant for RoHS
All of products are Halogen-free
Part No | K4B4G1646E-BYMA |
DRAM Type | DDR3L SDRAM |
Chip Density (bit) | 4G |
Organization | 256Mx16 |
Number of Internal Banks | 8 |
Number of Words per Bank | 32M |
Number of Bits/Word (bit) | 16 |
Data Bus Width (bit) | 16 |
Maximum Clock Rate (MHz) | 1866 |
Maximum Access Time (ns) | 0.195 |
Address Bus Width (bit) | 18 |
Minimum Operating Supply Voltage (V) | 1.283|1.425 |
Typical Operating Supply Voltage (V) | 1.5|1.35 |
Maximum Operating Supply Voltage (V) | 1.45|1.575 |
Operating Current (mA) | 131 |
Minimum Operating Temperature (°C) | 0 |
Maximum Operating Temperature (°C) | 95 |
Supplier Temperature Grade | Commercial |
Number of I/O Lines (bit) | 16 |
Mounting | Surface Mount |
Package Width | 7.5 |
Package Length | 13.3 |
PCB changed | 96 |
Standard Package Name | BGA |
Supplier Package | FBGA |
Pin Count | 96 |
Lead Shape | Ball |